1. Field of the Invention
The present invention relates to a signal generating circuit controlling an L level period and an H level period of an output signal.
2. Description of Related Art
In recent years, as electronic devices perform high-speed operation, it has become more and more important to control the timing at which the pulse transits more finely. Japanese Unexamined Patent Application Publication No. 2000-269816 (Kudo et al.) discloses a PWM control circuit delaying a rising edge using a delay circuit. The PWM control circuit delays the rising edge to output a signal whose duty ratio is changed. However, in the PWM control circuit disclosed in Kudo et al., the cycle of the signal which is output is not at all considered. On the other hand, Japanese Unexamined Patent Application Publication No. 5-167404 (Shinpo) discloses an oscillation control device outputting a signal whose cycle is extended. The oscillation control device disclosed by Shinpo delays a reference clock generated by an oscillator using a plurality of delay circuits, selects any output from outputs of a plurality of delay circuits based on a counter value, and extends the pulse width of the clock.